Integrated circuitry density continues to increase and feature dimensions continue to get smaller. One aspect of semiconductor integrated circuitry fabrication is the etching of contact openings through insulating layers, such as borophosphosilicate glass (BPSG), to expose inward circuit regions to which electrical connection is desired.
Contact openings are typically presently formed by depositing an organic masking layer (photoresist, being one example) outwardly of the layer within which the opening is to be formed. The masking layer is patterned to leave desired contact openings therethrough while leaving other areas of the layer covered (i.e., masked) such that etching will not there occur. The insulating layer is thereafter etched through the organic masking layer openings, preferably highly selectively to remove the insulating layer at a substantially greater rate than any etching of the masking layer. The ultimate goal is to outwardly expose a desired region of the underlying substrate.
Forming such openings is preferably conducted using a highly anisotropic etch, such as a plasma etch. One such prior art etch employs an Applied Materials IPS Dielectric Etcher using reactive gas flows of CHF3 and CH2F2 at a volumetric ratio of 11:9, respectively. It was discovered using such chemistry that as the minimum feature dimension of the contact opening fell to 0.3 micron and below, the etched sidewalls of the feature layer being etched were becoming striated or otherwise roughened to a degree sufficient to impact critical dimension (CD) of the feature and overall yield. Such roughening apparently resulted from formation of striations or other roughenings in the opening sidewalls of the photoresist, which were being mask transferred to the feature layer. Such roughening was more prone to occur in useful processing windows in high density deposition tools, namely in processing windows where acceptable uniformity across the substrate could be achieved. Such sidewall striations might also have occurred in etching of larger contact openings, but were not problematic due to the larger opening dimensions. However at the 0.3 micron level and below, roughened or otherwise striated sidewalls within a feature opening (i.e. a damascene trough, a contact opening or other feature) can adversely affect CD and yield.
The invention was motivated in addressing and overcoming this particular problem, yet is not so limited. Aspects of the invention are seen to have applicability to other aspects of plasma etching with the invention only being limited by the accompanying claims, appropriately interpreted in accordance with the Doctrine of Equivalents.